logic verification system的意思|示意
逻辑检验系统
logic verification system的网络常见释义
逻辑检验系统 ... 逻辑加法 {数} logical addition 逻辑检验系统 logic verification system 逻辑接地 logic ground ...
逻辑验证系统 ... 逻辑变量 logic variable 逻辑验证系统 logic verification system 逻辑工作站 logic work station，LWS ...
逻辑检验系统英语 ... 逻辑和门英语 【计】 logic sum gate 逻辑检验系统英语 【计】 logic verification system 逻辑赋值语句英语 【计】 logical assignment statement ...
翻译 logic verification system翻译 【计】 逻辑检验系统 low-pressure moulding翻译 【化】 低压模塑; 低压模塑法 .
logic verification system相关例句
After the study on the problems of formal specification and verification for network protocols, this paper gives out a general model system based on the temporal logic.
本文通过对网络协议形式化描述和验证问题的研究，针对网络协议的特性，给出了一种基于时态逻辑的模型系统。
It is proved that this type of counter has correct logic function according to EDA simulation and experimental verification with FPGA and can be normally used in the design of digital system.
经eda软件模拟仿真和FPGA硬件验证，表明该计数器具有正确的逻辑功能，能够正常地应用于数字系统的设计。
In terms of the authors sketch of design and verification of safety programs, a pointer logic system is designed for a subset of C-like language.
文中根据作者所设想的安全程序的设计和证明框架，为类c语言的一个子集设计了一个指针逻辑系统。
The logic design of FPGA could meet the demand of imaging and data transmission through simulation and verification. The imaging system will establish reliable foundation for the future application.
通过仿真验证fpga逻辑满足成像及数据传输要求，为后续应用奠定了基础。