Timing Bus的意思|示意
时间公交车
Timing Bus的网络常见释义
定时总线 l 定时总线（Timing Bus），从DXU至TRU间传送无线空间的 时钟信息。 l X总线，在各个TRU间以一个时隙为基础传送话音/数据信息。
时钟总线 2) 时钟总线（Timing Bus）：时钟总线从DXU单元至TRU单元间传送无线空间的时钟信息；
Timing Bus相关短语
1、 bus-timing emulation 总线时序仿真
2、 timing signal bus out 定时信号输出总线
3、 Bus Timing 总线时序 ; 总线定时
Timing Bus相关例句
At last, 1553 bus circuit design has been finished on the basis of studying the basic function and timing of 1553 chip EP-H31580.
最后，在研究EP - H31580 1553总线芯片的基本功能和读写时序的基础上，完成了1553总线模块的硬件设计。
The system utilizes CPLD to realize logical and timing control between DSP and multi-channel ADC. The interface between DSP's HPI and PCI bus is employed to achieve high-speed data transmission.
该系统采用CPLD实现了DSP与多通道adc的逻辑和时序控制，通过DSP的HPI与PCI总线接口设计实现了采集数据的高速传输。
The control boards of the electronic timing system and synchronization control system are connected by using CAN bus.
所设计的电子配时系统由上位机、段控板和机控板组成。
If the bus incorporates a robust timing margin, small adjustments in the clock timing should produce no errors.
如果总线有充足的时间间隙，时钟时间上很小的调整不会产生错误。
The invention discloses a bus priority signal timing method based on a running schedule with the adoption of a computer program.
本发明公开了采用计算机程序的基于运行时刻表的公交优先信号配时方法。
Once you select the timing source, you have many options for controlling the final bus frequency.
一旦选择了时钟源，可以有多种控制最终总线频率的选择。