Flip-flop and gate的意思|示意

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Flip-flop and gate的网络常见释义

触发器和门 ... Main Memory and mass storage 主内存和海量存储 Flip-flop and gate触发器和门 Program counter and register法式计数器和注册 ...

Flip-flop and gate相关例句

When both the input conditioning and main-gate flip-flop are logically true, the main gate opens for a period of time that is determined by the timer base divider.

当输入转换和主控门触发器同时为逻辑真时,主控门打开一定时间,这个时间由时基分配器决定。

The ECL OR-AND-gate can simplify a generalized ECL circuits structures, for example, an ECL double-edge-triggered D flip-flop.

作为常规ECL门的补充类型,常可用于简化一般ECL电路结构,例如ECL双边沿D触发器。

Original conditions: Use D flip-flop (74 LS 74), " and" gate (74 LS 08), " or" gate (74 LS 32), non-gate (74 LS 04), three binary mod 5 counter design.

原始条件:使用D触发器( 74 LS 74 )、“与”门 ( 74 LS 08 )、“或”门( 74 LS 32 )、非门 ( 74 LS 04 ),设计三位二进制模5计数器。